vishay siliconix SIS496EDNT document number: 62867 s13-1945-rev. b, 16-sep-13 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com n-channel 30 v (d-s) mosfet features ? trenchfet ? power mosfet ? 100 % r g and uis tested ? thin 0.75 mm height ? typical esd performance 2500 v ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? dc/dc converter ? battery switch ? power management ? for mobile computing notes: a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. see solder profile ( www.vishay.com/doc?73257 ). the thin powerpak 1212-8 is a leadless package. the end of the lead terminal is ex- posedcopper (not plated) as a result of the singulation proce ss in manufacturing. a solder fillet at the exposed copper tip can not be guar- anteed and is not required to ensure adequat e bottom side solder interconnection. e. rework conditions: manual soldering with a sol dering iron is not recommended for leadless components. f. maximum under steady state conditions is 81 c/w. product summary v ds (v) r ds(on) ( ? ) max. i d (a) a q g (typ.) 30 0.0048 at v gs = 10 v 50 14 nc 0.0062 at v gs = 4.5 v 50 ordering information: SIS496EDNT-t1-ge3 (lead (pb)-free and halogen-free) 1 2 3 4 5 6 7 8 s s s g d d d d 3.30 mm 3.30 mm thin powerpak ? 1212-8 bottom view 0.75 mm n-channel mosfet s d g absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 30 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) t c = 25 c i d 50 a a t c = 70 c 50 a t a = 25 c 20.4 b, c t a = 70 c 16.3 b, c pulsed drain current (t = 100 s) i dm 200 avalanche current l = 0.1 mh i as 25 avalanche energy e as 31 mj continuous source-drain diode current t c = 25 c i s 43.3 a t a = 25 c 3.2 b, c maximum power dissipation t c = 25 c p d 52 w t c = 70 c 33 t a = 25 c 3.8 b, c t a = 70 c 2 b, c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d, e 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient b, f t ? 10 s r thja 24 33 c/w maximum junction-to-case (drain) steady state r thjc 1.9 2.4
www.vishay.com 2 document number: 62867 s13-1945-rev. b, 16-sep-13 vishay siliconix SIS496EDNT this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com notes: a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 30 v v ds temperature coefficient ? v ds /t j i d = 250 a 30 mv/c v gs(th) temperature coefficient ? v gs(th) /t j - 5.2 gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 12.5v gate-source leakage i gss v ds = 0 v, v gs = 20 v 20 a v ds = 0 v, v gs = 10 v 1 zero gate voltage drain current i dss v ds = 30 v, v gs = 0 v 1 v ds = 30 v, v gs = 0 v, t j = 55 c 5 on-state drain current a i d(on) v ds ?? 5 v, v gs = 10 v 20 a drain-source on-state resistance a r ds(on) v gs ?? 10 v, i d = 20 a 0.0040 0.0048 ? v gs ?? 4.5 v, i d = 18 a 0.0051 0.0062 forward transconductance a g fs v ds = 15 v, i d = 20 a 80 s dynamic b input capacitance c iss v ds = 15 v, v gs = 0 v, f = 1 mhz 1515 pf output capacitance c oss 322 reverse transfer capacitance c rss 175 total gate charge q g v ds = 15 v, v gs = 10 v, i d = 20 a 29 45 nc v ds = 10 v, v gs = 4.5 v, i d = 20 a 14 21 gate-source charge q gs 4.5 gate-drain charge q gd 4.2 gate resistance r g f = 1 mhz 0.2 1.2 2.4 ? tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 1.5 ? i d ? 10 a, v gen = 4.5 v, r g = 1 ? 20 30 ns rise time t r 125 190 turn-off delay time t d(off) 24 40 fall time t f 10 20 tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 1.5 ? i d ? 10 a, v gen = 10 v, r g = 1 ? 10 20 rise time t r 16 24 turn-off delay time t d(off) 25 40 fall time t f 38 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c 50 a pulse diode forward current (t = 100 s) i sm 200 body diode voltage v sd i s = 10 a, v gs ?? 0 v 0.8 1.2 v body diode reverse recovery time t rr i f = 10 a, di/dt = 100 a/s, t j = 25 c 20 40 ns body diode reverse recovery charge q rr 10 20 nc reverse recovery fall time t a 8 ns reverse recovery rise time t b 12
document number: 62867 s13-1945-rev. b, 16-sep-13 www.vishay.com 3 vishay siliconix SIS496EDNT this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com typical characteristics (25 c, unless otherwise noted) gate source voltage vs. gate current output characteristics on-resistance vs. drain current 0.000 0.010 0.020 0.030 0.040 0.050 0 6 12 18 24 30 i gss - gate current (ma) v gs - gate-source voltage (v) t j = 25 c 0 10 20 30 40 50 0 0.5 1 1.5 2 i d - drain current (a) v ds - drain-to-source voltage (v) v gs = 3 v v gs = 10 v thru 4 v 0.0015 0.003 0.0045 0.006 0.0075 0 10 20 30 40 50 r ds(on) - on-resistance () i d - drain current (a) v gs = 4.5 v v gs = 10 v gate source voltage vs. gate current transfer characteristics capacitance 10 -1 10 -2 10 -3 10 -4 10 -5 10 -6 10 -7 10 -8 10 -9 0 11 22 33 44 i gss - gate current (a) v gs - gate-to-source voltage (v) t j = 150 c t j = 25 c 0 0.5 1 1.5 2 0 0.6 1.2 1.8 2.4 3 i d - drain current (a) v gs - gate-to-source voltage (v) t c = 25 c t c = 125 c t c = - 55 c 0 420 840 1260 1680 2100 0 6 12 18 24 30 c - capacitance (pf) v ds - drain-to-source voltage (v) c iss c oss c rss
www.vishay.com 4 document number: 62867 s13-1945-rev. b, 16-sep-13 vishay siliconix SIS496EDNT this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com typical characteristics (25 c, unless otherwise noted) gate charge source-drain diode forward voltage threshold voltage 0 2 4 6 8 10 0 5 10 15 20 25 v gs - gate-to-source voltage (v) q g - total gate charge (nc) v ds = 24 v v ds = 15 v v ds = 8 v i d = 20 a 0.1 1 10 100 0.0 0.3 0.6 0.9 1.2 i s - source current (a) v sd - source-to-drain voltage (v) t j = 150 c t j = 25 c 1 1.25 1.5 1.75 2 - 50 - 25 0 25 50 75 100 125 150 v gs(th) (v) t j - temperature ( c) i d = 250 a on-resistance vs. junction temperature single pulse power (junction-to-ambient) on-resistance vs. gate-to-source voltage 0.6 0.95 1.3 1.65 2 - 50 - 25 0 25 50 75 100 125 150 r ds(on) - on-resistance (normalized) t j - junction temperature ( c) i d = 20 a v gs = 10 v v gs = 4.5 v v 0.01 0 1 40 50 10 600 time (s) 30 20 power (w) 0.1 10 100 0.000 0.003 0.006 0.009 0.012 0 2 4 6 8 10 r ds(on) - on-resistance ( ) v gs - gate-to-source voltage (v) t j = 125 c t j = 25 c i d = 20 a
document number: 62867 s13-1945-rev. b, 16-sep-13 www.vishay.com 5 vishay siliconix SIS496EDNT this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com typical characteristics (25 c, unless otherwise noted) * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-cas e thermal resistance, and is mo re useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determ ine the current rating, when this rating falls below the package limit. safe operating area, junction-to-ambient power junction-to-case 0.001 0.01 0.1 1 10 100 1000 0.1 1 10 100 i d - drain current (a) v ds - drain-to-source voltage (v) * v gs > minimum v gs at which r ds(on) is specified 100 ms limited by r ds(on) * 1 ms t a = 25 c single pulse bvdss limited 10 ms 100 s 10s, 1 s dc, 0 16 32 48 64 0 25 50 75 100 125 150 power (w) t c - case temperature ( c) current derating* 0 18 36 54 72 90 0 25 50 75 100 125 150 i d - drain current (a) t c - case temperature ( c)
www.vishay.com 6 document number: 62867 s13-1945-rev. b, 16-sep-13 vishay siliconix SIS496EDNT this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com typical characteristics (25 c, unless otherwise noted) vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62867 . normalized thermal transient im pedance, junction-to-ambient 10 -3 10 -2 1 10 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized eff ective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja = 81 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-case 10 -3 10 -2 1 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized ef fective transient thermal impedance
package information www.vishay.com vishay siliconix revison: 18-feb-13 1 document number: 62836 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 powerpak ? 1212-8t millimeters inches dim. min. nom. max. min. nom. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 - 0.05 0.000 - 0.002 b 0.23 0.30 0.41 0.009 0.012 0.016 c 0.23 0.28 0.33 0.009 0.011 0.013 d 3.20 3.30 3.40 0.126 0.130 0.134 d1 2.95 3.05 3.15 0.116 0.120 0.124 d2 1.98 2.11 2.24 0.078 0.083 0.088 d3 0.48 - 0.89 0.019 - 0.035 d4 0.47 typ. 0.0185 typ. d5 2.3 typ. 0.090 typ. e 3.20 3.30 3.40 0.126 0.130 0.134 e1 2.95 3.05 3.15 0.116 0.120 0.124 e2 1.47 1.60 1.73 0.058 0.063 0.068 e3 1.75 1.85 1.98 0.069 0.073 0.078 e4 0.34 typ. 0.013 typ. e 0.65 bsc 0.026 bsc k 0.86 typ. 0.034 typ. k1 0.35 - - 0.014 - - h 0.30 0.41 0.51 0.012 0.016 0.020 l 0.30 0.43 0.56 0.012 0.017 0.022 l1 0.06 0.13 0.20 0.002 0.005 0.008 ? 0 - 12 0 - 12 w 0.15 0.25 0.36 0.006 0.010 0.014 m 0.125 typ. 0.005 typ. ecn: t13-0056-rev. a, 18-feb-13 dwg: 6012
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